DTEST_EN=0, TSM_GPIO_OVLAY=00
DIGITAL TEST MUX CONTROL
DTEST_PAGE | DTEST Page Selector |
DTEST_EN | DTEST Enable 0 (0): Disables DTEST. The DTEST pins assume their mission function. 1 (1): Enables DTEST. The contents of the selected page (DTEST_PAGE) will appear on the DTEST output pins. |
GPIO0_OVLAY_PIN | GPIO 0 Overlay Pin |
GPIO1_OVLAY_PIN | GPIO 1 Overlay Pin |
TSM_GPIO_OVLAY | TSM GPIO Overlay Pin Control 0 (00): there is no overlay, and the DTEST Page Table dictates the node that appears on each DTEST pin. 1 (01): the register GPIO0_OVLAY_PIN[3:0] selects the DTEST pin on which GPIO0_TRIG_EN will appear. |
DTEST_SHFT | DTEST Shift Control |
RAW_MODE_I | DTEST Raw Mode Enable for I Channel |
RAW_MODE_Q | DTEST Raw Mode Enable for Q Channel |